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STM32G473RET3

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Mouser No:

511-STM32G473RET3

Mfr. No:

STM32G473RET3

Mfr.:

STMicroelectronics

Description:

ARM Microcontrollers - MCU Mainstream Arm Cortex-M4 MCU 170MHz 512Kbytes of Flash Math Accel, High Analog l

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Datasheet:

STM32G473RET3 Datasheet (PDF)

ECAD Model:

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Learn more about STMicroelectronics STM32G473RET3

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	STMicroelectronics
Product Category:	ARM Microcontrollers - MCU
Delivery Restriction:	Mouser does not presently sell this product in your region.
RoHS:
Series:	STM32G4
Mounting Style:	SMD/SMT
Package/Case:	LQFP-64
Core:	ARM Cortex M4
Program Memory Size:	512 kB
Data Bus Width:	32 bit
ADC Resolution:	16 bit
Maximum Clock Frequency:	170 MHz
Number of I/Os:	107 I/O
Data RAM Size:	128 kB
Supply Voltage - Min:	1.71 V
Supply Voltage - Max:	3.6 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 125 C
Packaging:	Tray
Brand:	STMicroelectronics
Country of Assembly:	Not Available
Country of Diffusion:	Not Available
Country of Origin:	FR
DAC Resolution:	12 bit
Data RAM Type:	SRAM
Moisture Sensitive:	Yes
Number of Timers/Counters:	1617 Timer
Product:	MCUs
Product Type:	ARM Microcontrollers - MCU
Program Memory Type:	Flash
Factory Pack Quantity:	960
Subcategory:	Microcontrollers - MCU
Tradename:	STM32
Watchdog Timers:	Watchdog Timer, Windowed

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Datasheet

STM32G473RET3 Datasheet (PDF)

PCN

CNHTS:: 8542311992
CAHTS:: 8542310000
USHTS:: 8542310025
TARIC:: 8542319000
ECCN:: 3A991.a.2

STM32G4 Mixed-Signal Microcontrollers (MCUs)

STMicroelectronics STM32G4 Mixed-Signal Microcontrollers (MCUs) combines a 32-bit Arm® Cortex®-M4 core (with FPU and DSP instructions) running at 170MHz. This is also combined with 3 different hardware accelerators: ART Accelerator™, CCM-SRAM routine booster, and mathematical accelerators. A flexible interconnect matrix allows autonomous communication between peripherals and saves CPU resources and power consumption. A high degree of compatibility with the STM32F3 Series guarantees outstanding efficiency when designing derivatives of applications at different performance levels.